In modern IC design, and in particular in the field of portable wireless transceivers, a very high degree of integration, with minimum external components, is mandatory for cost reduction. In current semiconductor process, without an expensive trimming process, the component values of raw passive resistive (R) and capacitive (C) devices can vary over a wide range. Temperature variation can also cause on-chip RC values to change. Such wide RC variation makes the design of a continuous time RC filter, with stable corner frequency, challenging. One known solution is to embed an automatic calibration mechanism within the chip to maintain the RC product constant.
FIG. 1 depicts a functional circuit diagram of conventional RC calibration circuit 10, the purpose of which is to calibrate the R or C value in another circuit, such as a slave filter 28. The filter 28 may be used, for example, in a frequency-conversion mixer or the like. The circuit 10 accomplishes this by calibrating the values of a corresponding resistor RREF or capacitor CC, and setting the R or C element in the slave filter 28 to the same value (FIG. 1 depicts adjustment of CC). A current mirror 12 generates two current sources supplying currents IREF1 and IREF2 into a resistor RREF and a capacitor CC, respectively, to generate VR and VC. In the resistor branch, the constant current flows into the resistor RREF to generate VR=IREF1*RREF. In the capacitor branch, the current will be integrated on the capacitor CC for a fixed period of time TTAR. If the capacitor CC initial voltage equals zero, at the end of current integration, VC=IREF2*TTAR/CC. TTAR is the target time constant, in general generated by a crystal oscillator (not shown), which can have high accuracy, with frequency errors well below 1%.
A comparator 14 and sequential approximation register (SAR) 16 are the basis of a digital calibration circuit 10 using a binary searching algorithm to minimize the difference VRC VR−VC. The searching process minimizes VRC at the input of the comparator 14 by properly tuning the value of R or C. At the end of the searching processing, VR=VC or equivalently IREF1*RREF=IREF2*TTAR/CC. If IREF1=IREF2, the reference current can be cancelled out and the proper calibration TTAR=RREF*CC is achieved. The final digital control word (DCW) code output by the SAR 16 is distributed to the slave filter 18. By periodically recalibrating the circuit 10 and adjusting the value of R or C in the slave filter 18, the filter 18 is tuned to have a time constant independent of process and temperature variation.
One problem with a conventional RC calibration circuit 10, such as that of FIG. 1, is that it requires IREF1 to match to IREF2. Any mismatch between IREF1 and IREF2 will result in an RC time constant calibration error. In order to improve the current source matching performance, the current source device size must increase. The problem with increasing the device size is that the parasitic capacitance CPM associated with current source output node will increase with the device size. Any extra capacitance added to the current source output node will result in an RC time constant calibration error, because the charge delivered by the current source will be shared by CC and CPM. Accordingly, the conventional RC time constant calibration circuit 10, such as that of FIG. 1, cannot be optimized to achieve high calibration accuracy, even if the circuit layout size is not restricted.
Another problem with the conventional RC calibration circuit 10 is that any parasitic capacitance present in the branch between the current source transistor and CC, e.g., the parasitic capacitance from the input of comparator CP, will result in calibration error, since the total charge sourced from the current source is shared by CC and the parasitic capacitance.